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HN27C1024HCP Series
65536-word x 16-bit CMOS One Time Electrically Programmable ROM
Description
The Hitachi HN27C1024HCP is 65536-word x 16-bit one time electrically programmable ROM. Initially, all bits of the HN27C1024HCP are in the "1" state (output high). Data is introduced by selectively programming "0" into the desired bit location. This device is packaged in plastic package, therefore, it cannot be rewritten and erased.
Features
* Small outline package for high density mounting * Fast high-reliability page programming and fast high-reliability programming: Program voltage; +12.5 V DC Program time; 14 sec (typ) (Theoretical in page programming) * High speed: Access time 100 ns/120 ns/150 ns (max) * Low power dissipation: Active mode; 60 mW/MHz (typ) * Inputs and outputs TTL compatible during both read and program modes * Device identifier mode: Manufacturer code and device code
Ordering Information
Type No. HN27C1024HCP-10 HN27C1024HCP-12 HN27C1024HCP-15 Access Time 100 ns 120 ns 150 ns Package 44-pin PLCC (CP-44)
HN27C1024HCP Series
Pin Arangement
I/O13
I/O14
I/O15
PGM
A15
6 I/O12 I/O11 I/O10 I/O9 I/O8 VSS NC I/O7 I/O6 I/O5 I/O4 7 8 9 10 11 12 13 14 15 16 17
5
4
3
2
1 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 A13 A12 A11 A10 A9 V SS NC A8 A7 A6 A5
18 19 20 21 22 23 24 25 26 27 28 I/O3 I/O2 I/O1 I/O0 OE A0 A1 A2 A3 NC A4
(Top View)
Pin Description
Pin Name A0 - A15 I/O0 - I/O15 CE OE PGM VCC VPP VSS NC Function Address Input/output Chip enable Output enable Programming enable Power supply Programming power supply Ground No connection
2
A14
VCC
VPP
NC
NC
CE
HN27C1024HCP Series
Block Diagram
A6 X-Decoder A15 1024 x 1024 Memory Matrix
I/O0 I/O15
Input Data Control
Y-Gating Y-Decoder
CE OE PGM VCC VPP VSS H H : High Threshold Inverter A0 A5
3
HN27C1024HCP Series
Mode Selection
Mode Read Output disable Standby Program Program verify Page data latch Page program CE (3) VIL VIL VIH VIL VIL VIH VIH VIL Program inhibit VIL VIH VIH Identifier VIL Notes: 1. X: Don't care. 2. VH : 12.0 V 0.5 V OE (22) VIL VIH X VIH VIL VIL VIH VIL VIH VIL VIH VIL PGM (43) VIH VIH X VIL VIH VIH VIL VIL VIH VIL VIH VIH A9 (35) X X X X X X X X X X X VH *
2
VPP (2) VCC VCC VCC VPP VPP VPP VPP VPP VPP VPP VPP VCC
VCC (44) VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
I/O (4 - 11, 14 - 21) Dout High-Z High-Z Din Dout Din High-Z High-Z High-Z High-Z High-Z Code
Absolute Maximum Ratings
Parameter All input and output voltages* A9 input voltage* VPP voltage*
1 1 1 1
Symbol Vin, Vout VID VPP VCC Topr Tstg Tbias
Value -0.6* to +7.0 -0.6* to +13.5 -0.6 to +13.0 -0.6 to +7.0 0 to +70 -55 to +125 -10 to +80
2 2
Unit V V V V C C C
VCC voltage*
Operating temperature range Storage temperature range Storage temperature under bias
Notes: 1. Relative to VSS . 2. Vin, Vout, V ID min = -1.0 V for pulse width 50 ns
Capacitance (Ta = 25C, f = 1 MHz)
Parameter Input capacitance Output capacitance Symbol Cin Cout Min -- -- Typ -- -- Max 6 12 Unit pF pF Test Conditions Vin = 0 V Vout = 0 V
4
HN27C1024HCP Series
Read Operation
DC Characteristics (VCC = 5 V 5%, VPP = VCC, Ta = 0 to +70C)
Parameter Input leakage current Output leakage current VPP current Standby V CC current Operating VCC current Symbol I LI I LO I PP1 I SB I CC1 I CC2 I CC3 Input voltage VIL VIH Output voltage VOL VOH Min -- -- -- -- -- -- -- -0.3* 2.2 -- 2.4
1
Typ -- -- 1 -- -- -- -- -- -- -- --
Max 2 2 20 25 50 100 25 0.8 VCC + 1* 0.45 --
2
Unit A A A mA mA mA mA V V V V
Test Conditions Vin = 5.25 V Vout = 5.25 V/0.45 V VPP = 5.5 V CE = VIH Iout = 0 mA, CE = VIL Iout = 0 mA, f = 10 MHz Iout = 0 mA, f = 1 MHz
I OL = 2.1 mA I OH = -400 A
Notes: 1. VIL min = -1.0 V for pulse width 50 ns 2. VIH max = VCC +1.5 V for pulse width 20 ns If V IH is over the specified maximum value, read operation cannot be guaranteed.
AC Characteristics (VCC = 5 V 5%, VPP = VCC, Ta = 0 to +70C) Test Conditions * * * * Input pulse levels: 0.45 to 2.4 V Input rise and fall time: 10 ns Output load: 1 TTL gate +100 pF Reference levels for measuring timing: 1.5 V
HN27C1024HCP -10 Parameter Address to output delay CE to output delay OE to output delay OE high to output float* Address to output hold Note:
1
-12 Max 100 100 50 50 -- Min -- -- -- 0 0 Max 120 120 50 50 --
-15 Min -- -- -- 0 0 Max 150 150 50 50 -- Unit Test Conditions ns ns ns ns ns CE = OE = VIL OE = VIL CE = VIL CE = VIL CE = OE = VIL
Symbol Min t ACC t CE t OE t DF t OH -- -- -- 0 0
1. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven.
5
HN27C1024HCP Series
Read Timing Waveform
Address
CE Standby Mode tCE OE tOE tACC Data Out Data Out Valid tDF tOH Active Mode Standby Mode
6
HN27C1024HCP Series
Fast High-Reliability Programming
This device can be applied the fast high-reliability programming algorithm shown in the following flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data.
START SET PROG./VERIFY MODE VPP = 12.5 0.3 V, VCC = 6.0 0.25 V Address = 0 n=0 n+1 n
Program tPW = 0.2 ms 5% Address + 1 Address VERIFY NOGO NO
GO Program tOPW = 0.2n ms NO LAST Address?
n = 25 YES
YES SET READ MODE VCC = 5.0 V 0.25 V, VPP = VCC READ All Address GO END FAIL NOGO
Fast High-Reliability Programming Flowchart
7
HN27C1024HCP Series
DC Characteristics (VCC = 6 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C)
Parameter Input leakage current VPP supply current Operating VCC current Input voltage Symbol I LI I PP I CC VIL VIH Output voltage VOL VOH Min -- -- -- -0.1* 2.2 -- 2.4
5
Typ -- -- -- -- -- -- --
Max 2 40 50 0.8 VCC + 0.5*6 0.45 --
Unit A mA mA V V V V
Test Conditions Vin = 6.25 V/0.45 V CE = PGM = VIL
I OL = 2.1 mA I OH = -400 A
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12.5 V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V to VIL when CE = low. 5. VIL min = -0.6 V for pulse width 20 ns. 6. If V IH is over the specified maximum value, programming operation cannot be guaranteed.
8
HN27C1024HCP Series
AC Characteristics (VCC = 6 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C) Test Conditions * Input pulse levels: 0.45 to 2.4 V * Input rise and fall time: 20 ns * Reference levels for measuring timing: Inputs; 0.8 V, 2.0 V, Outputs; 0.8 V, 2.0 V
Parameter Address setup time OE setup time Data setup time Address hold time Data hold time OE to output float delay VPP setup time VCC setup time PGM initial programming pulse width Symbol t AS t OES t DS t AH t DH t DF * t VPS t VCS t PW
1
Min 2 2 2 0 2 0 2 2 0.19 0.19 2 0
Typ -- -- -- -- -- -- -- -- 0.2 -- -- --
Max -- -- -- -- -- 130 -- -- 0.21 5.25 -- 150
Unit s s s s s ns s s ms ms s ns
Test Conditions
PGM overprogramming pulse width t OPW* 2 CE setup time Data valid from OE t CES t OE
Notes: 1. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 2. Refer to the programming flowchart for tOPW.
9
HN27C1024HCP Series
Fast High-Reliability Programming Timing Waveform
Program Program Verify
Address tAS tAH
Data tDS VPP VPP VCC VCC+1 VCC VCC tVCS tVPS
Data in Stable tDH
Data Out Valid tDF
CE tCES PGM
tPW OE
tOES
tOE
10
HN27C1024HCP Series
Fast High-Reliability Page Programming
This device can be applied the fast high-reliability page programming algorithm shown in the following flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data.
START SET PAGE PROGRAM LATCH MODE VPP = 12.5 0.3 V, VCC = 6.0 0.25 V Address = 0 n=0 Latch Address + 1 Latch n+1 n Address
NO n = 25 YES
SET PAGE PROG./VERIFY MODE VPP = 12.5 0.3 V, VCC = 6.0 0.25 V Program tPW = 0.2 ms 5% Address + 1 Address VERIFY NOGO
GO Program tOPW = 0.2n ms NO LAST Address?
YES SET READ MODE VCC = 5.0 V 0.25 V, VPP = VCC READ All Address GO END NOGO
FAIL
Fast High-Reliability Page Programming Flowchart
11
HN27C1024HCP Series
DC Characteristics (VCC = 6 V 0.25 V, VPP =12.5 V 0.3 V, Ta = 25C 5C)
Parameter Input leakage current Output voltage during verify Symbol I LI VOL VOH Operating VCC current Input voltage*
3
Min -- -- 2.4 -- -0.1* 2.2 --
5
Typ -- -- -- -- -- -- --
Max 2 0.45 -- 50 0.8 VCC + 0.5*6 50
Unit A V V mA V V mA
Test Conditions Vin = 6.25 V/0.45 V I OL = 2.1 mA I OH = -400 A
I CC VIL VIH
VPP supply current
I PP
PGM = VIL
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while V PP = 12.5 V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V to VIL when CE = low. 5. VIL min = -0.6 V for pulse width 20 ns. 6. If V IH is over the specified maximum value, programming operation cannot be guaranteed.
12
HN27C1024HCP Series
AC Characteristics (VCC = 6 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C) Test Conditions * Input pulse levels: 0.45 to 2.4 V * Input rise and fall time: 20 ns * Reference levels for measuring timings: 0.8 V, 2.0 V
Parameter Address setup time OE setup time Data setup time Address hold time Symbol t AS t OES t DS t AH t AHL Data hold time OE to output float delay VPP setup time VCC setup time PGM initial programming pulse width t DH t DF * t VPS t VCS t PW
1
Min 2 2 2 0 2 2 0 2 2 0.19 0.19 2 0 1 2 2 2
Typ -- -- -- -- -- -- -- -- -- 0.2 -- -- -- -- -- -- --
Max -- -- -- -- -- -- 130 -- -- 0.21 5.25 -- 150 -- -- -- --
Unit s s s s s s ns s s ms ms s ns s s s s
Test Conditions
PGM overprogramming pulse width t OPW* 2 CE setup time Data valid from OE OE pulse width during data latch PGM setup time CE hold time OE hold time t CES t OE t LW t PGMS t CEH t OEH
Notes: 1. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 2. Refer to the programming flowchart for tOPW.
13
HN27C1024HCP Series
Fast High-Reliability Page Programming Timing Waveform
Page data latch A1 to A15 Page Program Program Verify
tAS A0
tAHL
tAH
tDF tDS Data Data in Stable tVPS VPP VCC VCC+1 VCC CE tCEH tCES tOEH Data Out Valid tDH tPGMS tOE
VPP
tVCS
VCC
PGM tPW tLW OE tOES
Mode Description
Device Identifier Mode The device identifier mode allows the reading out of binary codes that identify manufacturer and type of device, from outputs of OTPROM. By this mode, the device will be automatically matched its own corresponding programming algorithm, using programming equipment
14
HN27C1024HCP Series
HN27C1024HCP Identifier Code
A0 (24) VIL VIH I/O8- I/O15 (11)-(4) x x I/O7 (14) 0 1 I/O6 (15) 0 0 I/O5 (16) 0 1 I/O4 (17) 0 1 I/O3 (18) 0 1 I/O2 (19) 1 0 I/O1 (20) 1 1 I/O0 (21) 1 0
Identifier Manufacturer code Device code
Hex Data 07 BA
Notes: 1. A9 = 12.0 V 0.5 V 2. A1 -A8, A10-A15, CE, OE = VIL, PGM = VIH 3. X; Don't care.
Recommended Screening Conditions
Before mounting, please make the screening (baking without bias) shown in the right.
Program and verify by programmer
Baking at 125 to 150C for 24 to 48 hrs
Ensuring read-out
Mounting Recommended Screening Conditions
15
HN27C1024HCP Series
Package Dimensions
HN27C1024HCP Series (CP-44)
17.53 0.12 16.58 39 40 17.53 0.12 44 1 29 28
Unit: mm
4.40 0.20
6 7
0.74
18 17
0.43 0.10
1.27
2.55 0.15
15.50 0.50
15.50 0.50
0.10
16

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